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ADE7518
POWER SUPPLY MANAGEMENT (PSM) INTERRUPT
The power supply management (PSM) interrupt alerts the 8052
core of power supply events. The PSM interrupt is disabled by
default. Setting the EPSM bit in the Interrupt Enable and Priority 2
SFR (IEIP2, 0xA9) enables the PSM interrupt (see Table 60).
EPSR
FPSR
ESAG
FSAG
The Power Management Interrupt Enable SFR (IPSME, 0xEC)
controls the events that result in a PSM interrupt (see Table 19).
Figure 28 is a diagram illustrating how the PSM interrupt vector
is shared among the PSM interrupt sources. The PSM interrupt
flags are latched and must be cleared by writing to the IPSMF flag
register (see Table 16).
EBSO
FBSO
EVDCIN
FVDCIN
FPSM
EPSM
TRUE?
PENDING PSM
INTERRUPT
IPSME ADDR. 0xEC
IPSMF ADDR. 0xF8
IEIP2 ADDR. 0xA9
EPSR
FPSR
RESERVED
RESERVED
FPSM
PTI
ESAG
FSAG
RESERVED
RESERVED
RESERVED
PSI
RESERVED
RESERVED
EADE
RESERVED
RESERVED
ETI
EBSO
FBSO
EPSM
EVDCIN
FVDCIN
ESI
NOT INVOLVED IN PSM INTERRUPT SIGNAL CHAIN
Figure 28. PSM Interrupt Sources
Rev. 0 | Page 26 of 128
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